1. Field of the Invention
The present invention relates to a polishing composition to be used for polishing for planarization of the surface of semiconductors. More particularly, it relates to a polishing composition useful for forming an excellent polished surface having an excellent planarization characteristic in polishing for planarization of the surface containing copper and tantalum or a tantalum-containing compound, and a polishing process employing this composition.
2. Prior Art
Progress of so-called high technology products including computers has been remarkable in recent years, and parts to be used for such products, such as ULSI, have been developed for high integration and high speed, year after year. Along with such progress, the design rule for semiconductor devices has been progressively refined year after year, the depth of focus in a process for producing devices tends to be shallow, and planarization required for the pattern-forming surface tends to be increasingly severe.
Further, to cope with an increase in resistance of the wiring due to refinement of the wiring, it has been studied to employ copper wiring instead of tungsten wiring and aluminum wiring, as the wiring material.
By its nature, copper is hardly processable by etching, and accordingly, it requires the following process. Namely, after forming wiring grooves and perforations on an insulating layer, copper wirings are formed by sputtering or plating, and then an unnecessary copper layer deposited on the insulating layer is removed by chemical mechanical polishing (hereinafter referred to as CMP) which is a combination of mechanical polishing and chemical polishing.
However, in such a process, it may happen that copper atoms will diffuse into the insulating layer to deteriorate the device properties. Therefore, for the purpose of preventing diffusion of copper atoms, it has been studied to provide a barrier layer on the insulating layer having wiring grooves or perforations formed. As a material for such a barrier layer, metal tantalum or a tantalum-containing compound (hereinafter will generally be referred to as a tantalum-containing compound) is most suitable also from the viewpoint of the reliability of the device and is expected to be employed mostly in the future.
Accordingly, in such a CMP process for a semiconductor device containing such a copper layer and a tantalum-containing compound, firstly the copper layer as the outermost layer and then the tantalum-containing compound layer as the barrier layer, are polished, respectively, and polishing will be completed when it has reached the insulating layer of e.g. silicon dioxide or silicon trifluoride.